Fundamentals of power integrity for computer platforms and by Joseph T. DiBene II
By Joseph T. DiBene II
An all-encompassing textual content that specializes in the basics of energy integrity strength integrity is the research of strength distribution from the resource to the burden and the process point matters which may take place throughout it. For computers, those concerns can diversity from contained in the silicon to around the board and will egress into different elements of the platform, together with thermal, EMI, and mechanical. With a spotlight on desktops and silicon point strength supply, this e-book sheds gentle at the basics of energy integrity, using the author's wide heritage within the strength integrity and distinctive event in silicon strength structure, layout, and improvement. geared toward engineers drawn to studying the basic and complex subject matters of the sector, this booklet bargains vital bankruptcy insurance of basics in energy distribution, strength integrity research fundamentals, system-level energy integrity concerns, strength conversion in desktops, chip-level energy, and extra. basics of energy Integrity for desktop structures and structures: * Introduces readers to either the sector of energy integrity and to platform strength conversion * offers a special specialise in desktops and silicon point strength supply unavailable in different places * bargains unique research of universal difficulties within the * reports electromagnetic box and circuit illustration * contains a distinct bibliography of references on the finish of every bankruptcy * Works out a number of instance difficulties inside each one bankruptcy together with extra appendixes of tables and formulation, basics of strength Integrity for desktop systems and platforms is a perfect introductory textual content for engineers of energy integrity in addition to these within the chip layout undefined, particularly actual layout and packaging
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Additional info for Fundamentals of power integrity for computer platforms and systems
Step 2. Review all of the parasitics—putting these in a table and looking at the tolerances of each separately is a good idea. The tolerances may be used for the SPICE analyses later on. Step 3. Perform a first principles analysis on the PDN to make sure that, at least from a lumped element perspective, the data makes sense. Make sure that it is well understood that the accuracy of this first pass is a crude, though a reasonable, approximation to the final result. For example, if the droop result from this analysis is 100 mVpp, this would indicate that the 8 mVpp initial simulation may be suspicious.
Third, the engineer must know what maximum load current the load will draw. 1) where ???? is defined as the efficiency of the converter, POUT is the static output power delivered to the load, and PIN is the static input power delivered to the converter. One may compute the static power loss in the interconnect path by knowing the resistance, the temperature of each section, and the static current that the load is drawing. In general, it is common to sum up the resistances in each element in the interconnect independently once the temperature dependencies are known.
For this short discussion the focus will be on structures similar to the vertically diffused or VDMOS power FETs. 11 35 Two power N-MOSFET models—Complex and simple Power switches today have fairly complex structures, and most electrical models are quite sophisticated. However, the switch model can be simplified enough to allow for reasonable power computations within a power converter analysis. 11 shows two models, that are used for analyzing power dissipation in a typical power MOSFET device.